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COMPANY RESEARCH / AMD

Advanced Micro Devices

Embedded processors & adaptive compute

Published by FyncaResearch checked How we research

HUMANOID ROBOT

Where it fits in the robot

Embedded processors and adaptive computing address robot reasoning, sensor fusion, real-time networks, and motor control through the Kria robotics ecosystem.

What the evidence establishes

Robotics products

AMD documents processors, adaptive compute, and Kria robotics modules. Embedded processing is the relevant role, not memory-chip or heat-sink manufacturing.

A documented robotics component or industrial robot application. Humanoid adoption is not established by the cited source.

Component roleEmbedded processors & adaptive compute
EvidenceAMD documents processors, adaptive compute, and Kria robotics modules. Embedded processing is the relevant role, not memory-chip or heat-sink manufacturing.
Primary sourceAdvanced Micro Devices — supporting disclosure
Company or official disclosure; vendor claims are attributed to their source.
Checked. This is the research review date, not the source publication or quote time.

Keep in perspective

Robotics exposure is distributed across embedded products and does not represent the entire company.

Platform business exposure. This describes the breadth or role of the business; it is not an investment rating. A robotics product or development announcement does not by itself establish material humanoid revenue, market share, or future returns.

Connections to the assembly

These links explain the technology relationship. The model is illustrative and does not represent an actual manufacturer’s bill of materials.

Compute carrier board

The circuit board routes power and high-speed signals between compute, memory, and peripherals.

Scope of the company links: Compute modules and reference platforms, plus board interconnects (Amphenol) and power electronics (MPS). Not bare-PCB fabrication.

AI & control processor

The main processor executes perception and planning. Real-time control can run on separate processing cores or devices.

Scope of the company links: AI processors and embedded real-time controllers serve different workloads. Arm licenses processor IP; it does not manufacture chips.

AI SERVER RACK

Where it fits in an AI server rack

Launched the Helios rack-scale system on July 23, 2026: 72 Instinct MI455X GPUs and 18 6th Gen EPYC “Venice” CPUs joined by Pensando front-end, scale-up and scale-out networking, “now in production”. Named adopters include OpenAI, Anthropic, Meta, Microsoft and Oracle; systems come from HPE, Lenovo, Supermicro and Bull, with Sanmina and Wiwynn as infrastructure partners. OpenAI expects to bring Helios online from Q4 2026. The Instinct MI350 Series carries 288 GB of HBM3E per GPU (Micron, June 2025). Data Center segment revenue was $6.7B in Q2 2026.

What the evidence establishes

AI-rack evidence

Disclosed: AMD’s Advancing AI 2026 release describes Helios with 72 MI455X GPUs, 18 Venice CPUs and Pensando networking, and names its adopters and system partners.

An explicit AI-server or AI-rack product, design-in, supply role, program, reference design or partnership, such as a part named for rack-scale AI systems or a product sold for AI data centers. For a rack builder, it means the company’s own AI servers or racks. This does not establish revenue, market share, volumes or future sourcing.

Listed as a rack builder for its own AI servers and racks, not as a supplier of the parts inside.

Component roleInstinct GPUs, EPYC CPUs, Pensando NICs and Helios racks
EvidenceDisclosed: AMD’s Advancing AI 2026 release describes Helios with 72 MI455X GPUs, 18 Venice CPUs and Pensando networking, and names its adopters and system partners.
How we knowDisclosed The company’s own filing, release, annual report, product page or investor record describes the AI-server or AI-rack role. Where customers are unnamed, the listing says so.
Primary sourceAdvanced Micro Devices — supporting disclosure
Company or official disclosure; vendor claims are attributed to their source.
Checked. This is the research review date, not the source publication or quote time.

Keep in perspective

Helios deployments start with OpenAI from Q4 2026, so there is no rack-scale shipment history yet, and AMD does not split GPU from CPU revenue. AMD sold ZT Systems’ data-center manufacturing business to Sanmina (closed Oct 27, 2025), which became a preferred manufacturing partner for its rack-scale AI solutions.

Platform business exposure. This describes the breadth or role of the business; it is not an investment rating. An AI-server product, design-in or partnership does not by itself establish material AI-rack revenue, market share, or future returns.

Connections to the assembly

These links explain the technology relationship. The model is illustrative and does not represent an actual manufacturer’s bill of materials.

GPU compute dies

Two reticle-sized logic dies joined into one GPU, built on a leading-edge foundry process. They run the matrix math of training and inference. Custom accelerators designed by or for cloud companies are the main alternative.

Scope of the company links: The compute dies. NVIDIA designs Blackwell and Blackwell Ultra (208 billion transistors on two reticle-limited dies, custom TSMC 4NP) and AMD designs the Instinct MI350 and MI455X; NVIDIA discloses that TSMC fabricates Blackwell. Custom accelerators are the alternative: Broadcom co-develops OpenAI-designed accelerators and racks (its other XPU customers are unnamed), Marvell develops custom AI silicon for unnamed customers, and the design-service houses Alchip (an N3 accelerator for a North American cloud provider, from May 2026) and GUC (AI accelerator design support) disclose programs without naming customers. Intel’s Gaudi 3 is a merchant AI accelerator with no documented rack-scale deployment. Hyperscaler chip designers (Google TPU, AWS Trainium) are not mapped because they do not sell the chips as components. Samsung is named as an NVIDIA wafer foundry but not for Blackwell GPU dies, so it is not mapped here.

Host CPU

An Arm-based or x86 processor that runs the operating system, stages data and coordinates the GPUs. In rack-scale designs it shares a coherent high-bandwidth link with its GPUs.

Scope of the company links: NVIDIA’s Grace is the host CPU of GB200/GB300 NVL72: a GB200 rack has 36 Grace CPUs with 2,592 Arm Neoverse V2 cores (NVIDIA spec page). Arm licenses the Neoverse cores; in March 2026 it also launched its own AGI CPU silicon. x86 alternatives are AMD EPYC (18 Venice CPUs in AMD’s Helios rack) and Intel Xeon hosts in 8-GPU HGX-class servers. Montage’s Jintide x86 CPUs have no documented AI-rack role and are not mapped.

SuperNICs & network cards

Network cards at 400 to 800 Gb/s, about one per GPU, that carry scale-out traffic over InfiniBand or Ethernet to other racks.

Scope of the company links: GB300 NVL72 gives each GPU 800 Gb/s through ConnectX-8 SuperNICs (NVIDIA product page); ConnectX-9 offers 1.6 Tb/s. Broadcom sells Ethernet NICs into AI data centers (FY2025 10-K), and AMD’s Pensando Pollara AI NICs are the alternative in AMD systems such as Helios. Some hyperscalers use in-house NICs (analyst reports), which are not listed products.

DPUs

Data processing units: network cards with their own processor cores that offload storage, security and virtualization from the host CPU.

Scope of the company links: NVIDIA’s BlueField-3 (400 Gb/s) and BlueField-4 (800 Gb/s) DPUs offload networking, storage and security; NVIDIA lists two BlueField-3 DPUs per GB200 compute tray. AMD’s Pensando DPUs are the alternative in AMD designs. Intel IPUs and Marvell OCTEON DPUs had no AI-rack evidence in our sources and are not mapped.

QUANTUM COMPUTER

Where it fits in a quantum computer

IBM Quantum built its prototype real-time decoder for the [[144,12,12]] gross code on an AMD Virtex UltraScale+ XCVU19P FPGA, reaching a 24 ns belief-propagation iteration time, enough for an average per-cycle decoding time under 1 µs (Oct 24, 2025), two months after IBM and AMD announced a quantum-centric supercomputing partnership. An AMD case study with Zurich Instruments’ CTO says its QCCS control system generates and reads qubit signals with Zynq UltraScale+ RFSoCs and uses Virtex UltraScale+ and Versal Premium devices in its system controller; AMD also quotes Quantum Machines crediting AMD FPGAs for its real-time control, and the open-source QICK controller runs on AMD RFSoC boards.

What the evidence establishes

Quantum-computing evidence

Partner-disclosed: IBM Quantum’s decoder paper builds its prototype on an AMD XCVU19P FPGA, and an AMD case study with Zurich Instruments’ CTO describes the AMD RFSoCs and Versal devices in its QCCS.

An explicit quantum-computing product, design-in, supply role, program or partnership, such as a part sold for quantum computers or a named quantum-computer customer. For a maker, it means the company’s own quantum computers or processors. This does not establish revenue, market share, volumes or future sourcing.

Component roleRFSoCs and FPGAs inside qubit controllers and decoders
EvidencePartner-disclosed: IBM Quantum’s decoder paper builds its prototype on an AMD XCVU19P FPGA, and an AMD case study with Zurich Instruments’ CTO describes the AMD RFSoCs and Versal devices in its QCCS.
How we knowPartner-disclosed A named partner, customer or platform owner’s document names the company. The scope is that document’s system or program, not a general supply relationship.
Primary sourceAdvanced Micro Devices — supporting disclosure
Company or official disclosure; vendor claims are attributed to their source.
Checked. This is the research review date, not the source publication or quote time.

Keep in perspective

AMD does not report quantum revenue, and a controller or decoder uses only a handful of devices. IBM’s decoder was verified with synthetic syndrome streams rather than on a running processor, and Keysight, Qblox and most proprietary controllers do not name their FPGA vendors.

Platform business exposure. This describes the breadth or role of the business; it is not an investment rating. A quantum-computing product, design-in or partnership does not by itself establish material quantum revenue, market share, or future returns.

Connections to the assembly

These links explain the technology relationship. The model is illustrative and does not represent an actual manufacturer’s bill of materials.

Waveform generators

Arbitrary waveform generators and fast digital-to-analog converters that synthesize the nanosecond pulses of every gate.

Scope of the company links: Keysight sells complete RF AWG modules (four-channel M5300A, DC–16 GHz) in its Quantum Control System, installed in a 256-qubit computer in Japan. Many controllers now synthesize pulses directly with RF data converters: AMD RFSoCs in the open-source QICK and in Zurich Instruments’ QCCS, and Analog Devices AD9082s in QuEL’s QuBE. Tektronix (Ralliant) markets its AWG5200 for superconducting-qubit control without a named customer. Zurich Instruments, Qblox, QuEL, Intermodulation Products and Spectrum Instrumentation are private. Texas Instruments’ bias DACs in QICK set DC flux levels rather than pulses, so TI is mapped under microwave sources instead. QuantumCTek’s ez-Q Engine measurement and control system (8 drive and 2 readout channels per unit) serves the Zuchongzhi superconducting computers, per its own product pages.

FPGA controllers

Field-programmable gate arrays, often RF system-on-chip devices with converters on board, that sequence pulses, read results and feed back within microseconds.

Scope of the company links: AMD is the only FPGA vendor named inside qubit controllers in the sources checked: Zynq UltraScale+ RFSoCs in QICK and Zurich Instruments’ QCCS, Virtex UltraScale+ and Versal Premium devices in Zurich Instruments’ system controller, Alveo U50 boards in QuEL’s QuBE, and AMD FPGAs credited by Quantum Machines. The sequencer logic is designed by the controller makers, which are private. Keysight and Qblox do not name their FPGA vendors in the sources opened, and no Intel/Altera, Microchip or Lattice design-in was found, so none is mapped.

Readout digitizers

Fast analog-to-digital converters that capture and demodulate the readout signals, turning them into qubit measurement results.

Scope of the company links: Keysight’s QCS uses M5200A digitizers (four 2 GHz, 12-bit channels) behind M5201A down converters. RF-sampling ADCs increasingly do the job inside controllers: AMD RFSoCs capture readout in QICK and Zurich Instruments’ QCCS, and each AD9082 in QuEL’s QuBE adds two 6 GSPS ADCs. Teledyne SP Devices documents its ADQ digitizers in superconducting-qubit readout research at Royal Holloway, University of London. Zurich Instruments (SHFQA+ analyzers), Qblox, QuEL, Intermodulation Products and Spectrum Instrumentation are private. QuantumCTek’s ez-Q Engine includes readout channels, per its product pages.

Decoder & host server

A GPU and CPU server that calibrates the machine, compiles programs and decodes quantum error-correction syndromes in real time.

Scope of the company links: Real-time decoding runs on FPGAs beside the controller or on GPU/CPU hosts. NVIDIA’s NVQLink and CUDA-Q QEC link controllers to GPU servers with round trips under 4 µs, and Quantinuum decoded qLDPC codes in real time on its Helios processor through NVQLink. IBM Quantum designed a Relay-BP decoder prototype on an AMD XCVU19P FPGA (Oct 2025). HPE is integrating quantum processors, controllers and decoders with its Cray supercomputers in research testbeds. Riverlane, whose Deltaflow 2 decoders are integrated with Qblox control hardware, is private.

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