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COMPANY RESEARCH / TSM

Taiwan Semiconductor Manufacturing Company

Foundry manufacturing for the semiconductor supply chain

HUMANOID ROBOT

Where it fits in the robot

Manufactures semiconductors designed by other companies. Foundry capacity and advanced process technology enable the compute supply chain, while remaining upstream of robot component design.

What the evidence establishes

Upstream enabler

TSMC is a semiconductor foundry. It belongs in an upstream manufacturing layer, not as a designer of a robot processor, sensor or complete robot.

Manufacturing infrastructure behind robot components. This is not a direct component supplier or an established humanoid revenue stream.

Component roleFoundry manufacturing for the semiconductor supply chain
EvidenceTSMC is a semiconductor foundry. It belongs in an upstream manufacturing layer, not as a designer of a robot processor, sensor or complete robot.
Primary sourceTaiwan Semiconductor Manufacturing Company — supporting disclosure
Company or official disclosure; vendor claims are attributed to their source.
Checked. This is the research review date, not the source publication or quote time.

Keep in perspective

Robotics-specific revenue is not isolated; sensitivity to the theme is highly diluted.

Diversified business exposure. This describes the breadth or role of the business; it is not an investment rating. A robotics product or development announcement does not by itself establish material humanoid revenue, market share, or future returns.

Connections to the assembly

This company is mapped at sector level. The reviewed evidence does not establish a direct match to a specific illustrated part. Explore ai & compute for the broader relationship.

AI SERVER RACK

Where it fits in an AI server rack

NVIDIA says Blackwell GPUs are made on a custom TSMC 4NP process, and its FY2026 10-K says it uses TSMC wafers and CoWoS packaging; the first US-made Blackwell wafer came out of TSMC Arizona (Oct 17, 2025). TSMC produces 5.5-reticle CoWoS and plans a 14-reticle CoWoS holding about 10 large compute dies and 20 HBM stacks for 2028 (Apr 22, 2026). Arm’s AGI CPU is also built on TSMC 3 nm.

What the evidence establishes

AI-rack evidence

Partner-disclosed: NVIDIA’s Blackwell page and FY2026 10-K name TSMC’s 4NP process and CoWoS packaging; TSMC’s own release describes its CoWoS roadmap.

An explicit AI-server or AI-rack product, design-in, supply role, program, reference design or partnership, such as a part named for rack-scale AI systems or a product sold for AI data centers. For a rack builder, it means the company’s own AI servers or racks. This does not establish revenue, market share, volumes or future sourcing.

Component roleFoundry and CoWoS packaging for AI accelerators
EvidencePartner-disclosed: NVIDIA’s Blackwell page and FY2026 10-K name TSMC’s 4NP process and CoWoS packaging; TSMC’s own release describes its CoWoS roadmap.
How we knowPartner-disclosed A named partner, customer or platform owner’s document names the company. The scope is that document’s product or program, not a general supply relationship.
Primary sourceTaiwan Semiconductor Manufacturing Company — supporting disclosure
Company or official disclosure; vendor claims are attributed to their source.
Checked. This is the research review date, not the source publication or quote time.

Keep in perspective

TSMC does not name customers or split AI revenue by product. That Blackwell uses the CoWoS-L variant is widely reported but not confirmed in the sources captured, and some packaging steps are outsourced to OSATs.

Platform business exposure. This describes the breadth or role of the business; it is not an investment rating. An AI-server product, design-in or partnership does not by itself establish material AI-rack revenue, market share, or future returns.

Connections to the assembly

These links explain the technology relationship. The model is illustrative and does not represent an actual manufacturer’s bill of materials.

GPU compute dies

Two reticle-sized logic dies joined into one GPU, built on a leading-edge foundry process. They run the matrix math of training and inference. Custom accelerators designed by or for cloud companies are the main alternative.

Scope of the company links: The compute dies. NVIDIA designs Blackwell and Blackwell Ultra (208 billion transistors on two reticle-limited dies, custom TSMC 4NP) and AMD designs the Instinct MI350 and MI455X; NVIDIA discloses that TSMC fabricates Blackwell. Custom accelerators are the alternative: Broadcom co-develops OpenAI-designed accelerators and racks (its other XPU customers are unnamed), Marvell develops custom AI silicon for unnamed customers, and the design-service houses Alchip (an N3 accelerator for a North American cloud provider, from May 2026) and GUC (AI accelerator design support) disclose programs without naming customers. Intel’s Gaudi 3 is a merchant AI accelerator with no documented rack-scale deployment. Hyperscaler chip designers (Google TPU, AWS Trainium) are not mapped because they do not sell the chips as components. Samsung is named as an NVIDIA wafer foundry but not for Blackwell GPU dies, so it is not mapped here.

Interposer & 2.5D packaging

A silicon interposer, or silicon bridges in an organic layer, carries thousands of fine wires between the logic dies and the HBM. Building it and assembling the dies onto it is the advanced-packaging step.

Scope of the company links: TSMC’s CoWoS is the packaging NVIDIA names in its 10-K; TSMC produces 5.5-reticle CoWoS and plans 14-reticle packages with 20 HBM stacks for 2028. NVIDIA named Amkor and ASE’s subsidiary SPIL as its packaging and testing partners in Arizona (Apr 2025), and both describe 2.5D silicon-interposer packages for GPUs and HBM in their annual filings. Which steps each performs for a given GPU (chip-on-wafer or on-substrate) is not disclosed, and that Blackwell uses the CoWoS-L variant is reported, not confirmed in our sources. Intel’s EMIB-class packaging has no documented AI-rack program here and is not mapped.

Lasers & photonics

Electro-absorption modulated or continuous-wave lasers, and silicon-photonics chips, that turn the signal into light inside the transceiver.

Scope of the company links: InP lasers (EML, CW, VCSEL) and silicon-photonics chips inside modules and co-packaged engines. Lumentum and Coherent make EMLs and CW/high-power lasers and hold NVIDIA purchase commitments for lasers (Mar 2, 2026); Mitsubishi Electric estimates it led data-center EML chips in FY25 and plans over 3x EML capacity by FY30; Sumitomo Electric makes EMLs and CW lasers for AI data centers; Broadcom runs in-house InP/GaAs laser fabs and sells a pluggable laser source for its CPO switches. TSMC provides the silicon photonics in NVIDIA’s CPO switches, Tower runs silicon-photonics foundry platforms for 400G–1.6T modules, TFC makes external-laser-source modules, Furukawa sells CW-DFB chips for silicon photonics, Marvell includes silicon photonics in its interconnect portfolio and MACOM sells lasers and photodetectors. AXT supplies InP substrates upstream. AOI makes laser chips only for its own modules and is mapped under transceivers. TrendForce (reported, context only) puts combined EML and CW-DFB capacity near 50.7 million units a month in 2026.

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