Where it fits in an AI server rack
Sells DDR5 server memory interface chipsets (RCD, PMIC, SPD hub and temperature sensors) for RDIMMs and MRDIMMs, and credits sustained DDR5 RCD leadership for record 2025 product revenue of $347.8M (up 41%). On Apr 22, 2026 it announced a SOCAMM2 chipset, an SPD hub plus 12 A and 3 A voltage regulators, for LPDDR5X server modules at up to 9.6 Gb/s aimed at AI server platforms, with a supporting quote from Micron.
What the evidence establishes
AI-rack evidencePositioning: Rambus’s release presents the SOCAMM2 chipset for AI server platforms without naming a customer; its DDR5 RDIMM chipset is a disclosed data-center product.
An explicit AI-server or AI-rack product, design-in, supply role, program, reference design or partnership, such as a part named for rack-scale AI systems or a product sold for AI data centers. For a rack builder, it means the company’s own AI servers or racks. This does not establish revenue, market share, volumes or future sourcing.
| Component role | DDR5 RDIMM and SOCAMM2 memory interface chips |
|---|---|
| Evidence | Positioning: Rambus’s release presents the SOCAMM2 chipset for AI server platforms without naming a customer; its DDR5 RDIMM chipset is a disclosed data-center product. |
| How we know | Positioning A dedicated AI-server or AI-data-center product or reference design, with no named customer. Marketed for AI racks; not a disclosed design win. |
| Primary source | Rambus — supporting disclosure Company or official disclosure; vendor claims are attributed to their source. |
| Checked | . This is the research review date, not the source publication or quote time. |
Keep in perspective
No module, server or rack customer is named, and the SOCAMM2 release gives no availability date. RDIMM chips serve general servers as well as x86 AI trays.
Specialist business exposure. This describes the breadth or role of the business; it is not an investment rating. An AI-server product, design-in or partnership does not by itself establish material AI-rack revenue, market share, or future returns.
Connections to the assembly
These links explain the technology relationship. The model is illustrative and does not represent an actual manufacturer’s bill of materials.
CPU memory
Low-power LPDDR5X packages or modules beside an Arm CPU, or DDR5 memory modules with interface chips in x86 trays. The GPUs can reach this memory through the CPU.
Scope of the company links: Grace-class CPUs use LPDDR5X (up to 17 TB per GB200 NVL72, NVIDIA). Micron says its SOCAMM LPDDR5X module was developed with NVIDIA for GB300 and was in volume production (Mar 18, 2025); SK hynix reports significantly growing SOCAMM2 sales for AI servers (Q2 2026), and Samsung markets SOCAMM2 with no named platform. x86 trays use DDR5 RDIMMs or MRDIMMs whose interface chips come from Montage (RCD, MRCD/MDB) and Rambus (RCD, PMIC, SPD hub; a SOCAMM2 chipset from Apr 22, 2026); Renesas is sampling a third-generation MRDIMM chipset, with production expected in 2H 2027.
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