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HBM: the memory stacked beside AI accelerators

See how high-bandwidth memory stacks feed each GPU, why three companies make them, and what a design-in or a share figure does not establish.

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Towers of 8 to 12 DRAM dies joined by through-silicon vias and placed beside the logic dies. Eight stacks give one GPU hundreds of gigabytes and several terabytes per second of memory bandwidth.

What makes HBM different from server memory?

HBM stacks DRAM dies vertically, joins them with through-silicon vias and places the stack beside the GPU dies on the package’s interposer, so each stack reaches the processor over a very wide, very short connection. SK hynix’s 12-layer HBM3E, for example, stacks twelve 3 GB dies, each made 40% thinner, into a 36 GB stack at the height of the earlier eight-high product, running at 9.6 Gb/s, and its HBM4 widens the interface to 2,048 I/Os. NVIDIA puts 20 TB of HBM3E across the 72 GPUs of a GB300 NVL72 rack; the illustrated package shows eight stacks per GPU.

Who makes HBM, and what does each disclose?

Three companies: SK hynix, Micron and Samsung Electronics, all named as memory suppliers in NVIDIA’s FY2026 10-K. Micron’s disclosure is the most specific: in March 2025 it said its HBM3E 12-high 36 GB is designed into GB300 NVL72 and its 8-high 24 GB is available for GB200 NVL72, and its HBM3E sits in AMD’s Instinct MI350 Series at 288 GB per GPU. SK hynix reported HBM4 mass shipments from Q2 2026 and a multiyear NVIDIA partnership (June 2026) covering memory for Vera Rubin systems, without naming HBM products. Samsung says its HBM4 is designed for NVIDIA Vera Rubin and is in mass production; reports that its HBM3E qualified for NVIDIA in September 2025 come from Korean press and are not confirmed by either company.

What does a design-in or a share figure not tell you?

A design-in shows that a product was qualified for a platform at a date. It does not give the supplier’s share of that GPU, the price or the volume, and none of the three discloses its share of a specific GPU. Micron’s NVIDIA designations date from March 2025, while NVIDIA says Vera Rubin was ramping into full production by July 2026, so each generation needs its own evidence. SK hynix’s SEC prospectus cites a 56.4% HBM revenue share for Q1 2026; that is one figure for one quarter and is not combined here with any other estimate. Customers are concentrated and unnamed: SK hynix’s two largest were 14.8% and 12.4% of its Q1 2026 revenue.

How to research an HBM company

  1. Name the generation and stack height first (HBM3E 8-high or 12-high, HBM4). A design-in for one platform does not carry over to the next.
  2. Rank the evidence: the memory maker’s own release naming a platform, then the platform owner’s filing. Press reports of a qualification set no evidence level.
  3. Separate the stages: sampling, qualification, mass production and high-volume shipments are different milestones, and the releases use them precisely.
  4. Keep nearby roles apart: TSMC and packaging houses place HBM on the interposer, and GUC designs HBM interface IP for the accelerator die but makes no memory.
  5. Check the listing: SK hynix added Nasdaq ADSs (SKHY) on July 10, 2026, ten ADSs per share; Micron trades on Nasdaq; Samsung Electronics has no verified US line in stock3d.
  6. Use the list as a starting point: it is curated, not exhaustive, and the model is illustrative, not a bill of materials.

Sources

Engineering reference: GPU module example. Company-specific evidence is linked from the profiles below.

Explore the complete gpus, hbm & packaging sector · Read the mapping methodology

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